Reliable, small, and lightweight hardware that meets increasing performance requirements is today’s engineering challenge in the automotive industry.
Autonomous driving requires tremendous computational resources. The current trend of high-level ADAS architectures is a central design; uncompressed video, LiDAR, and other sensor data is sent directly to central computing units.
Depending on the resolution and sensor types, high-speed interfaces are used to send the data from the sensor devices, such as cameras, to the central processing unit (often called ADAS box or ADAS processing unit). Looking at today’s reference designs presented by various automotive Tier1s, these boxes need to able to process several Gb of data per second. As the number of cameras and sensors, like zonal LiDAR, is increasing, it is clear that the requirement of fast data processing is increasing as well. To design reliable hardware that is not too big or too heavy to fit into the car is today’s design challenge in the automotive industry.
Ordinary PC-like computing platforms are not powerful enough to satisfy the hunger for the ever-increasing demands of data processing. The flagship ADAS reference implementations rather look like mid-range server-like architectures: Very often with dedicated GPUs optimized for self-learning algorithms. From a hardware perspective, this means that within the computing unit multiple high-power microchips need to operate and communicate, consuming vast amounts of energy.
When comparing the overall system requirements to a static server, it becomes obvious that reliability and functional safety are much more important for ADAS applications. In self-driving cars, redundant systems are typically used for super safety functions like electronics braking or steering. Many electronic functions are just single-function circuits. To save human lives, the reliability of the hardware is crucial in self-driving cars.